1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same.
2. Description of the Related Art
Conventionally, in the technical field of semiconductor device, so-called charge trapping type non-volatile memory devices (flash memory) are known, The semiconductor devices includes a tunnel oxide layer, a charge trapping layer, a blocking oxide layer, and a gate electrode, which are sequentially formed on a silicon substrate.
Known examples of structures of such charge trapping type non-volatile memory devices include a SONOS structure (a stacked structure of a polysilicon layer, a SiO2 (amorphous) layer, a SiN layer, a SiO2 layer, and a silicon substrate), a SANOS structure (a stacked structure of a polysilicon layer, an Al2O3 (crystalline) layer, a SiN layer, a SiO2 layer, and a silicon substrate), a TANOS structure (a stacked structure of a TaN layer, an Al2O3 (crystalline) layer, a TaN layer, a SiO2 layer, and a silicon substrate), and a MANOS structure (a stacked structure of a metal layer, a Al2O3 (crystalline) layer, a TaN layer, a SiO2 layer, and a silicon substrate).
As stated above, a conventional charge trapping type non-volatile memory device employs a SiO2 (amorphous) layer, an Al2O3 (crystalline), or a high-k layer (HfO2 (crystalline) layer) as a blocking oxide layer (Refer to Patent Reference 1, Patent Reference 2, and Patent Reference 3).    [Patent Reference 1] Japanese Patent Laid-Open Publication No. 2006-203200    [Patent Reference 2] Japanese Patent Laid-Open Publication No. 2008-16814    [Patent Reference 3] Japanese Patent Laid-Open Publication No. 2008-34814